Computer Forum
Intel Arc Pro B70 Grafikkarte (Image © Intel)
Implementation of a vRAM Status Check Routine
The Intel Xe driver introduces a basic vRAM status check mechanism designed to verify the integrity of the last vRAM page. This process takes place during the early scan phase, with the last page serving as a “canary” to check several critical parameters, including the size of the base address register (BAR), the size of the central cache storage (CCS), and the identity mapping configuration.
This feature is specifically designed to identify configuration errors. On certain Battlemage (BMG) hardware, the CCS offset may be programmed with a misalignment. Without proper detection, this misalignment can cause the CCS memory to be incorrectly incorporated into the general allocator as standard VRAM. To prevent these checks from impacting production environments, the feature is currently disabled. It can only be enabled using the CONFIG_DRM_XE_DEBUG_MEM kernel build flag.
Hardware Memory Wear and Page Offlining
A major new feature in the Xe driver is support for page offlining—a feature that has undergone 21 rounds of technical review. This update enables the kernel driver to respond appropriately to physical hardware wear in video memory. The offlining mechanism allows the driver to identify faulty vRAM pages and permanently remove them from the available memory pool. By hiding these defective areas, the driver ensures that unstable or corrupted pages are not reused in subsequent memory allocations, thereby improving overall system stability.
To ensure transparency between the kernel and user space, the driver makes these defective memory areas visible via DebugFS. This allows system administrators and developers to monitor the state of the GPU memory and identify specific areas with hardware defects.
In addition to the improvements in memory status, the latest pull request introduces the ability to monitor the idle status of individual engines. This data is now provided via DebugFS and offers a more detailed insight into the operational status of the GPU’s various processing engines.
