Intel Xeon 6 P Cores (Image © Intel)
The Intel Xeon 6700P Series will introduce support for Registered Dual In-Line Memory Modules (RDIMMs) running at 8,000 MT/s on select SKUs. This represents a 25% increase in memory speed compared to the current standard of 6,400 MT/s for RDIMMs. Additionally, this update is expected to reduce memory latency by approximately 6%. This functionality will be delivered via a BIOS update and an “Update for Performance and Reliability” (UPLR) release on the Intel Xeon 6 platform. Mass production of these high-speed modules is scheduled for August through September 2026, marking one of the first implementations of this speed in mainstream server platforms.
As artificial intelligence workloads become increasingly complex, memory bandwidth has become a critical factor in overall system efficiency. High-performance accelerators and CPUs often experience idle cycles when they cannot be supplied with data from the rest of the platform quickly enough.
Technical measurements show that the transition to 8,000 MT/s RDIMMs enables an increase in total memory bandwidth of up to 20%. This improvement particularly benefits applications that rely on memory bandwidth and ensures that AI accelerators and high-core-count CPUs operate as a coordinated system rather than being constrained by data transfer speeds.
Future Roadmap and MRDIMM Integration
Beyond the initial RDIMM updates, Intel has outlined a roadmap for further increasing bandwidth to meet the demands of higher compute densities in analytics and high-performance computing (HPC).
In the first quarter of 2027, the company plans to enable support for Gen 2 Multiplexer DIMM (MRDIMM). This technology will enable Intel Xeon 6900P processors—which feature between 72 and 128 cores—to achieve speeds of up to 8,800 MT/s. This roadmap is intended to provide a scaling path for enterprises increasing their compute density while maintaining the data throughput required for these workloads.
